Embedded SoPC Design with Nios II Processor and Verilog Examples

Dr. Pong Chu has done Yoeman's work here. Unlike most applied engineering texts in which the author does a lot of hand-waving; iterating already well published knowledge, and inserting a desultory set of white papers and application notes, Professor Chu has done some serious heavy lifting in this book. Dr. Chu has basically produced the same book over a number of years using two flavors VHDL and Verilog on two FPGA platforms, Xilinx and Altera. However I say that in a good way, as this book is very clear, free of all but minor errors, and incredibly detailed with practical examples. The charts and graphs alone are a masterpieces and I'm sure they exist no where else. The amount of work Chu must have spent putting this all together in a presentable way is incredible. You could read the 1,000+ page SOPC/Qsys spec Altera generously provides but it will only serve as confusing soporific which will usually prove unhelpful unless you are after a very specific question and have the time to wade through it. There is both practical and recondite knowledge in this tome, which will take the graduate student, or practicing engineer, on the path to success as more company's move away from the outdated 8-bit assembly programed MCU's, more suitable for toasters and dishwashers, and into the exciting world of system on a chip (SoC). This book is focused on developing an up-loadable hardware architecture produced from HDL, and the SOPC(now Qsys) GUI for the FPGA, and then using the fungible Eclipse IDE to write C code to instruct it on how to behave. The Altera and Xilinx versions both utilize their respective free tool chains. No there probably wont be a Microsemi or Lattice version, but really who cares as you got the two big boys covered (Xilinx and Altera).This book is most suitable for:1. Graduate Computer Engineering students with an interest in FPGA's and SoC.2. Practicing Engineers new to SoC or the Altera/Xilinx tool flow.This book uses the Terasic DE1 Development board for its examples. If your newish to this you may want to get the cheaper Terasic DE0 board first and go through the included tutorials that comes with that board. As an aside Terasic does a wonderful job with their Altera products, the same certainly cannot be said about the Xilinx/Digilent relationship.As a final word Chu is sharing practical and applicable knowledge that very few university professors have. The small group of people that do know this stuff well don't normally share it, they are your principle engineers at company's like Raytheon, GE Embedded, and Samsung, or your highly compensated freelance FPGA consultants, and they have neither the time nor the inclination to help you learn, fortunately Dr. Chu does.

It's hard to believe this book only has two reviews. I bought it 2 years ago and read it cover to cover while performing all of the examples on my Altera DE1 board. This book is much better than any physical or online course out there. Examples are clear and easy to interpret. I only wish my instructors in college used books like this.I wrote an SRAM controller using the examples. I modified it slightly and you can view it on Youtube. I don't want to post any links here but you can do a search for SRAM CONTROLLER. Hope this review helps.

The best verilog / altera i have found!

FPGA SoC (system on a Chip) and hardware-software co-design are emerging and exciting technologies. Developing such system is quite complex, requiring knowledge from software algorithm to hardware design and everything in between. This book tries to tackle the problem and covers a wide range of topics, including hardware design via Verilog HDL (Hardware Description Language), FPGA based soft-core processor, custom I/O peripherals, hardware accelerators, bus interface, device drivers, embedded programming, and the integration of customer hardware, processor, and software.The book is divided into 4 parts:- Part I introduces key Verilog language constructs and digital design concepts, and systematically shows how to implement combinational circuit, sequential circuit, FSM, and FSMD (FSM with data path).- Part II is basically a stand-alone introduction to embedded C programming within Altera Nios II processor framework. It shows how to create a Nios based system with predesigned I/O cores, develop software with Altera IDE, and construct device drivers to access IO cores.- Part III provides an in-depth overview of Nios II bus structure and discusses the development of custom IO peripherals (i.e., IP cores). It utilizes the hardware techniques of Part I and software driver techniques of Part II to design a series of moderately complex IP cores, including a PS2 keyboard/mouse controller, a video controller with SRAM frame buffer, an audio codec controller, and an SD card controller with FAT file system.-Part IV demonstrates how to convert a software algorithm into a hardware accelerator. Three case studies are provided: GCD, Mandelbrot set, and DDFS. Their software and hardware implementations and performance are compared.Pros:- The book explains complicated concepts in a concise and easy-to-understand manner. Its presentation is clear, coherent and easy-to follow.- The book uses many relevant and practical design examples to illustrate and reinforce the key concepts. It actually makes the learning "fun."Cons:- The book does not cover "memory-mapped master" interface, "stream" interface, and multi-processor design.- The books doses not discuss the techniques to do hardware-software partition (such as software profiling etc).- The device drivers are written in C, not C++ (perhaps my personal preference).Caveats (what the book is NOT):- The book is not about learning Altera software. FPGA SoC is in the cutting edge of technology and the software is updated frequently. A published book is unlikely to cover the most recent version of software and should not be used as a tutorial to learn the software. I am using version 12 (version 10 used in book) and Qsys (SOPC Builder used in book). The procedures in the book generally apply although the GUI and some details change a little bit.- The book mainly focuses on how to design your own IP cores rather than using the vendor's existing IP cores.-While the IP cores and device drivers in this book are functional, they are just "skeletons" and are not robust. If you just want to find a core and are not interested in its internal design, it is better to search a core from the vendor library.The author has an FAQ in his web. You should take a look to see whether the book fits your need.In summary, I give the book 4.5 stars (half star taken off because of the missing topics in "Cons"). It is rounded to 5 since Amazon does not allow a half star.[Comparison to the earlier book]The author has an early book on this topic, " FPGA Prototyping By Verilog Examples: Xilinx Spartan-3 Version ." While it also covers Verilog and hardware design, there are significant differences. First, Xilinx devices and prototyping boards are used. Second, and more importantly, the discussion of hardware design is in a somewhat "isolated context" (i.e., just the hardware itself). The new SOPC book is targeted at Altera devices and DE series boards. The hardware design is in the context of "embedded FPGA SoC," which is more realistic and relevant and reflects the current industrial practices. The SOPC book is also expanded significantly to include many new and emerging technologies. If you already have a Xilinx board and just want to learn Verilog, the FPGA prototyping book is fine. If you start from scratch, you should obtain an Altera DE series board and follow this book. You will be amazed by the capability and flexibility of today's FPGA technology.